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ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
15 years 6 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
CORR
2007
Springer
98views Education» more  CORR 2007»
15 years 6 months ago
Bistable Biorders: A Sequential Domain Theory
We give a simple order-theoretic construction of a Cartesian closed category of sequential functions. It is based on bistable biorders, which are sets with a partial order — the ...
James Laird
195
Voted
JIRS
2008
100views more  JIRS 2008»
15 years 6 months ago
Model-based Predictive Control of Hybrid Systems: A Probabilistic Neural-network Approach to Real-time Control
Abstract This paper proposes an approach for reducing the computational complexity of a model-predictive-control strategy for discrete-time hybrid systems with discrete inputs only...
Bostjan Potocnik, Gasper Music, Igor Skrjanc, Boru...
JPDC
2008
167views more  JPDC 2008»
15 years 6 months ago
A performance study of general-purpose applications on graphics processors using CUDA
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly progr...
Shuai Che, Michael Boyer, Jiayuan Meng, David Tarj...
JMLR
2006
156views more  JMLR 2006»
15 years 6 months ago
Large Scale Multiple Kernel Learning
While classical kernel-based learning algorithms are based on a single kernel, in practice it is often desirable to use multiple kernels. Lanckriet et al. (2004) considered conic ...
Sören Sonnenburg, Gunnar Rätsch, Christi...
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