174 search results - page 15 / 35 » Instruction Fetch Mechanisms for Multipath Execution Process... |
CJ
2006
14 years 9 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...
ARCS
2010
Springer
15 years 4 months ago
2010
Springer
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
CF
2006
ACM
15 years 3 months ago
2006
ACM
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...