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130
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DAC
2002
ACM
16 years 3 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
15 years 7 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...
116
Voted
GLVLSI
2006
IEEE
112views VLSI» more  GLVLSI 2006»
15 years 8 months ago
A simulation methodology for reliability analysis in multi-core SoCs
Reliability has become a significant challenge for system design in new process technologies. Higher integration levels dramatically increase power densities, which leads to high...
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Yusuf...
122
Voted
ICIP
2006
IEEE
16 years 3 months ago
Using Non-Parametric Kernel to Segment and Smooth Images Simultaneously
Piecewise constant and piecewise smooth Mumford-Shah (MS) models have been widely studied and used for image segmentation. More complicated than piecewise constant MS, global Gaus...
Weihong Guo, Yunmei Chen
105
Voted
ICIP
2000
IEEE
16 years 3 months ago
Hierarchical Image Probability (HIP) Models
We formulate a model for probability distributions on image spaces. We show that any distribution of images can be factored exactly into conditional distributions of feature vecto...
Clay Spence, Lucas C. Parra, Paul Sajda