1192 search results - page 127 / 239 » Instruction Level Distributed Processing |
PPOPP
2010
ACM
15 years 5 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
IPPS
2005
IEEE
15 years 4 months ago
2005
IEEE
Multimedia extensions (MME) are architectural extensions to general-purpose processors to boost the performance of multimedia workloads. Today, in-line assembly code, intrinsic fu...
AINA
2007
IEEE
15 years 4 months ago
2007
IEEE
This position paper proposes a device-blending architecture for aggregating device functionality via inter-device peer-topeer relationships, effectively forming a multi-device “...
APLAS
2006
ACM
15 years 4 months ago
2006
ACM
We define and study a distributed cryptographic implementation for an asynchronous pi calculus. At the source level, we adapt simple type systems designed for establishing formal ...
CCGRID
2005
IEEE
15 years 4 months ago
2005
IEEE
We present an architectural framework for specifying and processing co-reservations in Grid environments. Compared to other approaches, our co-reservation framework is more genera...