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IFIPPACT
1994
14 years 11 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
ARITH
2001
IEEE
15 years 1 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
EDO
2000
Springer
15 years 1 months ago
Distributed Proxy: A Design Pattern for the Incremental Development of Distributed Applications
Developing a distributed application is hard due to the complexity inherent to distributed communication. Moreover, distributed object communication technology is always changing,...
António Rito Silva, Francisco Assis Rosa, T...
ICIP
2003
IEEE
15 years 11 months ago
Wavelet-based level set evolution for classification of textured images
We present a supervised classification model based on a variational approach. This model is specifically devoted to textured images. We want to get a partition of an image, compos...
Jean-François Aujol, Gilles Aubert, Laure B...
ICIP
2007
IEEE
15 years 11 months ago
DSP Implementation of Deblocking Filter for AVS
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefor...
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao