1192 search results - page 80 / 239 » Instruction Level Distributed Processing |
105
click to vote
FTCS
1993
15 years 3 months ago
1993
Interval availability is a dependability measure defined by the fraction of time during which a system is in operation over a finite observation period. The computation of its d...
107
click to vote
ICS
1998
Tsinghua U.
15 years 6 months ago
1998
Tsinghua U.
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
PDPTA
2007
15 years 3 months ago
2007
AgentTeamwork coordinates parallel job execution in a hierarchy of mobile agents. A collection of specialized agents are deployed to remote sites including multiple clusters so as...
137
click to vote
ICS
2007
Tsinghua U.
15 years 8 months ago
2007
Tsinghua U.
Process arrival pattern, which denotes the timing when different processes arrive at an MPI collective operation, can have a significant impact on the performance of the operatio...
136
click to vote
HOTI
2008
IEEE
15 years 8 months ago
2008
IEEE
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...