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» Instruction Level Distributed Processing
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ISHPC
2000
Springer
15 years 1 months ago
Loop Termination Prediction
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
Timothy Sherwood, Brad Calder
IPPS
2010
IEEE
14 years 8 months ago
Oblivious algorithms for multicores and network of processors
We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hi...
Rezaul Alam Chowdhury, Francesco Silvestri, Brando...
176
Voted
POPL
2001
ACM
15 years 10 months ago
Nomadic pict: correct communication infrastructure for mobile computation
This paper addresses the design and verification of infrastructure for mobile computation. In particular, we study language primitives for communication between mobile agents. The...
Asis Unyapoth, Peter Sewell
85
Voted
EDOC
2007
IEEE
15 years 4 months ago
Implementing Business Conversations with Consistency Guarantees Using Message-Oriented Middleware
The paper considers distributed applications where interactions between constituent services take place via messages in an asynchronous environment with unpredictable communicatio...
Carlos Molina-Jiménez, Santosh K. Shrivasta...
80
Voted
PVM
2004
Springer
15 years 3 months ago
Numerical Simulations on PC Graphics Hardware
On recent PC graphics cards, fully programmable parallel geometry and pixel units are available providing powerful instruction sets to perform arithmetic and logical operations. In...
Jens Krüger, Thomas Schiwietz, Peter Kipfer, ...