Sciweavers

1192 search results - page 89 / 239
» Instruction Level Distributed Processing
Sort
View
113
Voted
ICS
2009
Tsinghua U.
15 years 5 months ago
High-performance regular expression scanning on the Cell/B.E. processor
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
Daniele Paolo Scarpazza, Gregory F. Russell
93
Voted
ICPP
2002
IEEE
15 years 3 months ago
Software Caching using Dynamic Binary Rewriting for Embedded Devices
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
Chad Huneycutt, Joshua B. Fryman, Kenneth M. Macke...
CASES
2005
ACM
15 years 26 days ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
115
Voted
ICS
2004
Tsinghua U.
15 years 4 months ago
EXPERT: expedited simulation exploiting program behavior repetition
Studying program behavior is a central component in architectural designs. In this paper, we study and exploit one aspect of program behavior, the behavior repetition, to expedite...
Wei Liu, Michael C. Huang
99
Voted
COORDINATION
2004
Springer
15 years 4 months ago
On Calculi for Context-Aware Coordination
Abstract. Modern distributed computing demands unprecedented levels of dynamicity and reconfiguration. Mobile computing, peer-to-peer networks, computational grids, multiagent sys...
Pietro Braione, Gian Pietro Picco