2784 search results - page 146 / 557 » Instruction Level Parallelism |
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ICS
2001
Tsinghua U.
15 years 9 months ago
2001
Tsinghua U.
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...
124
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IEEEPACT
1999
IEEE
15 years 9 months ago
1999
IEEE
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
161
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IPPS
1998
IEEE
15 years 9 months ago
1998
IEEE
Abstract. We address the general problem of automatically proving safety properties of reactive systems within the UNITY model. We take up a relational and set-based approach, and ...
124
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AGENTS
1997
Springer
15 years 9 months ago
1997
Springer
We describe a uniform technique for representing both sensory data and the attentional state of an agent using a subset of modal logic with indexicals. The resulting representatio...
141
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CHES
2006
Springer
15 years 8 months ago
2006
Springer
Abstract. We propose a superscalar coprocessor for high-speed curvebased cryptography. It accelerates scalar multiplication by exploiting instruction-level parallelism (ILP) dynami...