2784 search results - page 147 / 557 » Instruction Level Parallelism |
171
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TVLSI
2008
15 years 4 months ago
2008
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
154
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IEEEPACT
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
160
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ICCAD
2009
IEEE
15 years 2 months ago
2009
IEEE
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
114
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ICPP
2006
IEEE
15 years 10 months ago
2006
IEEE
Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP ar...
123
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ICPADS
1994
IEEE
15 years 8 months ago
1994
IEEE
: Software cache coherence schemes are very desirable in the design of scalable multiprocessors and massively parallel processors. The authors propose a software cache coherence sc...