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EUROPAR
2003
Springer
15 years 10 months ago
Compiler-Assisted Thread Level Control Speculation
Abstract. This paper proposes two compiler-assisted techniques to improve thread level control speculation in speculative multithreading executions. The first technique is to incr...
Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Da...
ESCIENCE
2006
IEEE
15 years 10 months ago
FAME: Adding Multi-Level Authentication to Shibboleth
The paper describes the design of FAME (Flexible Access Middleware Extension) architecture aimed at providing multi-level user authentication service for Shibboleth, which is endo...
Aleksandra Nenadic, Ning Zhang, Jay Chin, Carole A...
115
Voted
ACSD
2005
IEEE
121views Hardware» more  ACSD 2005»
15 years 10 months ago
LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level
We describe a toolbox for the analysis of Systems-on-achip described in SystemC at the transactional level. The tools are able to extract information from SystemC code, and to bui...
Matthieu Moy, Florence Maraninchi, Laurent Maillet...
SRDS
1998
IEEE
15 years 9 months ago
System-Level Versus User-Defined Checkpointing
Checkpointing and rollback recovery is a very effective technique to tolerate transient faults and preventive shutdowns. In the past, most of the checkpointing schemes published i...
Luís Moura Silva, João Gabriel Silva
138
Voted
PADS
1996
ACM
15 years 9 months ago
Time Management in the DoD High Level Architecture
Recently, a considerable amount of effort in the U.S. Department of Defense has been devoted to defining the High Level Architecture (HLA) for distributed simulations. This paper ...
Richard Fujimoto, Richard M. Weatherly