2784 search results - page 163 / 557 » Instruction Level Parallelism |
158
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CAV
2008
Springer
15 years 6 months ago
2008
Springer
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
170
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CCGRID
2005
IEEE
15 years 10 months ago
2005
IEEE
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
133
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CLUSTER
2005
IEEE
15 years 10 months ago
2005
IEEE
Jobs submitted into a cluster have varying requirements depending on user-specific needs and expectations. Therefore, in utility-driven cluster computing, cluster Resource Manage...
156
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FCCM
2008
IEEE
15 years 11 months ago
2008
IEEE
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
159
Voted
DSN
2007
IEEE
15 years 11 months ago
2007
IEEE
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...