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ICPADS
2007
IEEE
15 years 10 months ago
Optimizing Katsevich image reconstruction algorithm on multicore processors
The Katsevich image reconstruction algorithm is the first theoretically exact cone beam image reconstruction algorithm for a helical scanning path in computed tomography (CT). Ho...
Eric Fontaine, Hsien-Hsin S. Lee
ISCA
2003
IEEE
114views Hardware» more  ISCA 2003»
15 years 9 months ago
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture
This paper describes the polymorphous TRIPS architecture which can be configured for different granularities and types of parallelism. TRIPS contains mechanisms that enable the p...
Karthikeyan Sankaralingam, Ramadass Nagarajan, Hai...
CORR
2010
Springer
59views Education» more  CORR 2010»
15 years 2 months ago
Refinement and Verification of Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and ...
Paul Z. Kolano, Carlo A. Furia, Richard A. Kemmere...
FPL
2007
Springer
115views Hardware» more  FPL 2007»
15 years 10 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
IBERAMIA
2004
Springer
15 years 9 months ago
Towards CNC Programming Using Haskell
Recent advances in Computerized Numeric Control (CNC) have allowed the manufacturing of products with high quality standards. Since CNC programs consist of a series of assembler-li...
Gustavo Arroyo, Claudio Ochoa, Josep Silva, Germ&a...