2784 search results - page 201 / 557 » Instruction Level Parallelism |
126
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COGSCI
2002
15 years 4 months ago
2002
Much of cognitive psychology focuses on effects measured in tens of milliseconds while significant educational outcomes take tens of hours to achieve. The task of bridging this ga...
146
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ARITH
2001
IEEE
15 years 8 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
161
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ICS
2009
Tsinghua U.
15 years 11 months ago
2009
Tsinghua U.
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
169
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LCTRTS
2005
Springer
15 years 10 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
126
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ICS
2001
Tsinghua U.
15 years 8 months ago
2001
Tsinghua U.
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...