2784 search results - page 204 / 557 » Instruction Level Parallelism |
131
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IPPS
2005
IEEE
15 years 10 months ago
2005
IEEE
The Parallel-Horus framework, developed at the University of Amsterdam, is a unique software architecture that allows non-expert parallel programmers to develop fully sequential m...
124
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JPDC
2006
15 years 4 months ago
2006
We describe a new suite of computational benchmarks that models applications featuring multiple levels of parallelism. Such parallelism is often available in realistic flow comput...
131
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ICPP
2007
IEEE
15 years 10 months ago
2007
IEEE
As multi-core microprocessors are becoming widely adopted, the need to extract thread-level parallelism (TLP) from single-threaded applications in a seamless fashion increases. In...
131
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IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
In this paper we address the physical parallelization of a very efficient genetic algorithm (GA) known as gradual distributed real-coded GA (GD-RCGA). This search model naturally...
144
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IPPS
1999
IEEE
15 years 8 months ago
1999
IEEE
Parallel computing is becoming increasing central and mainstream, driven both by the widespread availability of commodity SMP and high-performance cluster platforms, as well as th...