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PDP
2003
IEEE
15 years 9 months ago
An XML based framework for self-describing parallel I/O data
File I/O data is interpreted by high performance parallel/distributed applications mostly as a sequence of arbitrary bits. This leads to the situation where data is ’volatile’...
András Belokosztolszki, Erich Schikuta
HPCA
1996
IEEE
15 years 8 months ago
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters
Networks of workstations and high-performance microcomputers have been rarely used for running highperformance applicationslike multimedia, simulations,scientific and engineering ...
Evangelos P. Markatos, Manolis Katevenis
ISCA
2006
IEEE
92views Hardware» more  ISCA 2006»
15 years 4 months ago
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cr...
SIGPLAN
2008
15 years 4 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
Simone Campanoni, Giovanni Agosta, Stefano Crespi-...
TVLSI
2002
130views more  TVLSI 2002»
15 years 3 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana