2784 search results - page 224 / 557 » Instruction Level Parallelism |
134
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IEEEINTERACT
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper introduces a method for improving program run-time performance by gathering work in an application and executing it efficiently in an integrated thread. Our methods ext...
127
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HPCA
2008
IEEE
16 years 4 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
138
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MICRO
2007
IEEE
15 years 10 months ago
2007
IEEE
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
147
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ISCA
2005
IEEE
15 years 9 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
128
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ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...