Sciweavers

2784 search results - page 238 / 557
» Instruction Level Parallelism
Sort
View
134
Voted
HPCA
1997
IEEE
15 years 8 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
PODC
1994
ACM
15 years 8 months ago
A Performance Evaluation of Lock-Free Synchronization Protocols
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
Anthony LaMarca
NPC
2010
Springer
15 years 2 months ago
Vectorization for Java
Java is one of the most popular programming languages in today’s software development, but the adoption of Java in some areas like high performance computing, gaming, and media p...
Jiutao Nie, Buqi Cheng, Shisheng Li, Ligang Wang, ...
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
14 years 11 months ago
Task Superscalar: An Out-of-Order Task Pipeline
We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential...
Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex...
HOTI
2008
IEEE
15 years 10 months ago
Optical Interconnects for Present and Future High-Performance Computing Systems
Optical interconnects are useful for high-performance electronic computing systems when the number-ofchannels, the bit-rate per channel, the channel density, and the communication...
Ashok V. Krishnamoorthy, Jon Lexau, Xuezhe Zheng, ...