2784 search results - page 244 / 557 » Instruction Level Parallelism |
128
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ESTIMEDIA
2004
Springer
15 years 9 months ago
2004
Springer
Abstract—Few analytical performance models that relate performance figure of merit to architectural design decisions are reported in recent studies of network-on-chip, which pre...
164
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IEEEINTERACT
2003
IEEE
15 years 9 months ago
2003
IEEE
Recent studies on program execution behavior reveal that a large amount of execution time is spent in small frequently executed regions of code. Whereas adaptive cache management ...
144
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EUROMICRO
1998
IEEE
15 years 8 months ago
1998
IEEE
This paper introduces thread integration, a new method of providing low-cost concurrency for microcontrollers and microprocessors. This post-pass compiler technology effectively i...
143
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SCCC
1998
IEEE
15 years 8 months ago
1998
IEEE
Frameworks promote design and code reuse, at a higher level of granularity. The use of frameworks is a hard task though, because usually they lack documentation and instructions o...
126
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IJCAI
2007
15 years 5 months ago
2007
We introduce a human-computer interaction system which collaborates with a user by providing feedback during user activities. The goal of the system is to help a user complete a h...