2784 search results - page 284 / 557 » Instruction Level Parallelism |
144
Voted
ICS
2007
Tsinghua U.
15 years 10 months ago
2007
Tsinghua U.
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
140
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ICS
2007
Tsinghua U.
15 years 10 months ago
2007
Tsinghua U.
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
114
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ISCA
2006
IEEE
15 years 10 months ago
2006
IEEE
Thread-level speculation (TLS) has proven to be a promising method of extracting parallelism from both integer and scientific workloads, targeting speculative threads that range ...
143
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RTCSA
2006
IEEE
15 years 10 months ago
2006
IEEE
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
166
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ASPLOS
2000
ACM
15 years 8 months ago
2000
ACM
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...