2784 search results - page 308 / 557 » Instruction Level Parallelism |
159
Voted
TCAD
2002
15 years 3 months ago
2002
Specialized clustered very large instruction word (VLIW) processors combined with effective compilation techniques enable aggressive exploitation of the high instruction-level para...
169
Voted
ASAP
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
146
Voted
MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
146
Voted
DAC
2011
ACM
14 years 3 months ago
2011
ACM
Memory consistency litmus tests are small parallel programs that are designed to illustrate subtle differences between memory consistency models by exhibiting different outcomes...
102
Voted
ICMCS
2007
IEEE
15 years 10 months ago
2007
IEEE
The recent emergence of multi-core processors enables a new trend in the usage of computers. Computer vision applications, which require heavy computation and lots of bandwidth, u...