2784 search results - page 368 / 557 » Instruction Level Parallelism |
124
Voted
ICDCN
2010
Springer
15 years 10 months ago
2010
Springer
The proliferation of new modes of communication and collaboration has resulted in an explosion of digital information. To turn this challenge into an opportunity, the IT industry ...
119
Voted
IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
151
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HPCS
2008
IEEE
15 years 10 months ago
2008
IEEE
Overlapping computation with communication is a key technique to conceal the effect of communication latency on the performance of parallel applications. MPI is a widely used mess...
155
Voted
IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
The advent of multicore processors requires mainstream concurrent programming languages with high level concurrency constructs and effective debugging techniques. Unfortunately, m...
134
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ICPP
2007
IEEE
15 years 9 months ago
2007
IEEE
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...