2784 search results - page 380 / 557 » Instruction Level Parallelism |
137
Voted
IEEEINTERACT
2003
IEEE
15 years 8 months ago
2003
IEEE
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
131
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IWSOC
2003
IEEE
15 years 8 months ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
120
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SIGCOMM
2003
ACM
15 years 8 months ago
2003
ACM
We propose a new objective for network research: to build a fundamentally different sort of network that can assemble itself given high level instructions, reassemble itself as re...
124
Voted
SIGMETRICS
2003
ACM
15 years 8 months ago
2003
ACM
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
149
Voted
SIGUCCS
2003
ACM
15 years 8 months ago
2003
ACM
This paper is an account of some of the more instructive experiences we gained as we sought to ensure that our information technology training programs kept pace with a fast chang...