2784 search results - page 413 / 557 » Instruction Level Parallelism |
138
click to vote
IPPS
2005
IEEE
15 years 8 months ago
2005
IEEE
The problem of radio channel assignments with multiple levels of interference can be modeled using graph theory. Given a graph G, possibly infinite, and real numbers k1, k2, . . ...
124
click to vote
IPPS
2005
IEEE
15 years 8 months ago
2005
IEEE
— This paper introduces WSPeer, a high level interface to hosting and invoking Web services. WSPeer aims to support the diversification of Web service deployments by providing a...
144
click to vote
IPPS
2005
IEEE
15 years 8 months ago
2005
IEEE
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
122
click to vote
PDP
2005
IEEE
15 years 8 months ago
2005
IEEE
In this paper we present a methodology to analyze the behavior and performance of Java application servers using a performance analysis framework. This framework considers all lev...
117
click to vote
PODC
2005
ACM
15 years 8 months ago
2005
ACM
The obstruction-free Dynamic Software Transactional Memory (DSTM) system of Herlihy et al. allows only one transaction at a time to acquire an object for writing. Should a second ...