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121
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ASPLOS
2009
ACM
15 years 7 months ago
Performance analysis of accelerated image registration using GPGPU
This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
Peter Bui, Jay B. Brockman
100
Voted
LCTRTS
2009
Springer
15 years 7 months ago
Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring
The fine-grained parallelism inherent in FPGAs has encouraged their use in packet processing systems. Debugging and performance evaluation of such complex designs can be signifi...
Paul Edward McKechnie, Michaela Blott, Wim Vanderb...
EDOC
2009
IEEE
15 years 7 months ago
Using Enterprise Architecture Management Patterns to Complement TOGAF
—The design of an Enterprise Architecture (EA) management function for an enterprise is no easy task. Various frameworks exist as well as EA management tools, which promise to de...
Sabine Buckl, Alexander M. Ernst, Florian Matthes,...
139
Voted
HPDC
2009
IEEE
15 years 7 months ago
Interconnect agnostic checkpoint/restart in open MPI
Long running High Performance Computing (HPC) applications at scale must be able to tolerate inevitable faults if they are to harness current and future HPC systems. Message Passi...
Joshua Hursey, Timothy Mattox, Andrew Lumsdaine
ICDCSW
2009
IEEE
15 years 7 months ago
Performance Tradeoffs Among Percolation-Based Broadcast Protocols in Wireless Sensor Networks
Broadcast of information in wireless sensor networks is an important operation, e.g., for code updates, queries, membership information, etc. In this paper, we analyze and experim...
Vijay Raman, Indranil Gupta