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» Instruction Level Parallelism
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96
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HPCA
2008
IEEE
15 years 7 months ago
Prediction of CPU idle-busy activity pattern
Real-world workloads rarely saturate multi-core processor. CPU C-states can be used to reduce power consumption during processor idle time. The key unsolved problem is: when and h...
Qian Diao, Justin J. Song
ICDCSW
2008
IEEE
15 years 7 months ago
Design and Implementation of a WSN-Based Intelligent Light Control System
—Recently, wireless sensor networks (WSNs) have been widely discussed in many applications. In this paper, we propose a WSN-based intelligent light control system for indoor envi...
Meng-Shiuan Pan, Lun-Wu Yeh, Yen-Ann Chen, Yu-Hsua...
113
Voted
ISORC
2008
IEEE
15 years 7 months ago
Cyber Physical Systems: Design Challenges
Cyber-Physical Systems (CPS) are integrations of computation and physical processes. Embedded computers and networks monitor and control the physical processes, usually with feedb...
Edward A. Lee
101
Voted
AIMSA
2008
Springer
15 years 7 months ago
Incorporating Learning in Grid-Based Randomized SAT Solving
Abstract. Computational Grids provide a widely distributed computing environment suitable for randomized SAT solving. This paper develops techniques for incorporating learning, kno...
Antti Eero Johannes Hyvärinen, Tommi A. Juntt...
103
Voted
AINA
2007
IEEE
15 years 7 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...