2784 search results - page 78 / 557 » Instruction Level Parallelism |
JPDC
2000
14 years 11 months ago
2000
DAC
2008
ACM
16 years 27 days ago
2008
ACM
Future SoCs will contain multiple cores. For workloads with significant parallelism, prior work has shown the benefit of many small, multi-threaded, scalar cores. For workloads th...
DAC
1999
ACM
16 years 26 days ago
1999
ACM
It is generally believed that there will be little more variety in CPU architectures, and thus the design of Instruction-set Architectures (ISAs) will have no role in the future o...
109
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MICRO
1996
IEEE
15 years 4 months ago
1996
IEEE
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
114
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SASP
2008
IEEE
15 years 6 months ago
2008
IEEE
Abstract—Customised processor performance generally increases as additional custom instructions are added. However, performance is not the only metric that modern systems must ta...