2784 search results - page 89 / 557 » Instruction Level Parallelism |
LREC
2010
15 years 1 months ago
2010
After three years of work the Dutch Parallel Corpus (DPC) project has reached an end. The finalized corpus is a ten-million-word high-quality sentence-aligned bidirectional parall...
ICS
2000
Tsinghua U.
15 years 3 months ago
2000
Tsinghua U.
One of the main concerns in today's processor design is the issue logic. Instruction-level parallelism is usually favored by an out-of-order issue mechanism where instruction...
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IEEEPACT
2008
IEEE
15 years 6 months ago
2008
IEEE
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
ISCA
2006
IEEE
15 years 6 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...