Sciweavers

188 search results - page 13 / 38
» Instruction Set Extension Exploration in Multiple-Issue Arch...
Sort
View
FDL
2007
IEEE
15 years 6 months ago
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, ...
ISSS
1998
IEEE
120views Hardware» more  ISSS 1998»
15 years 3 months ago
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
Ing-Jer Huang, Ping-Huei Xie
HPCA
2008
IEEE
15 years 6 months ago
Speculative instruction validation for performance-reliability trade-off
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 3 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
15 years 4 months ago
A Video Compression Case Study on a Reconfigurable VLIW Architecture
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
Davide Rizzo, Osvaldo Colavin