Sciweavers

188 search results - page 15 / 38
» Instruction Set Extension Exploration in Multiple-Issue Arch...
Sort
View
111
Voted
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 3 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
99
Voted
ICS
2007
Tsinghua U.
15 years 5 months ago
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors
This paper explores the scalability of the Stream Processor architecture along the instruction-, data-, and thread-level parallelism dimensions. We develop detailed VLSI-cost and ...
Jung Ho Ahn, Mattan Erez, William J. Dally
HICSS
2002
IEEE
128views Biometrics» more  HICSS 2002»
15 years 4 months ago
Flexible Instructional Strategies for E-learning
This paper provides an overview on a German lighthouse research project called L3 in the area of e-learning systems that supply e-learning services via a virtual private network. ...
Michael Altenhofen, Joachim Schaper
100
Voted
CSE
2008
IEEE
15 years 1 months ago
Application Specific Processors for Multimedia Applications
A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. A...
Rashid Muhammad, Ludovic Apvrille, Renaud Pacalet
CASES
2005
ACM
15 years 1 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...