188 search results - page 19 / 38 » Instruction Set Extension Exploration in Multiple-Issue Arch... |
114
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CODES
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
140
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ISCA
2000
IEEE
15 years 4 months ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
135
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ISCA
2008
IEEE
15 years 6 months ago
2008
IEEE
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
IJCSA
2008
14 years 11 months ago
2008
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
ICPP
2008
IEEE
15 years 6 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...