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FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 5 months ago
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...
CIDR
2003
150views Algorithms» more  CIDR 2003»
15 years 29 days ago
The Database Machine: Old Story, New Slant?
Current database management system technology is not well equipped to provide adequate support for what has been deemed the 3rd wave of computing -- Ubiquitous Computing. Such app...
Julie A. McCann
VVS
2000
IEEE
128views Visualization» more  VVS 2000»
15 years 4 months ago
The ULTRAVIS system
This paper describes architecture and implementation of the ULTRAVIS system, a pure software solution for versatile and fast volume rendering. It provides perspective raycasting, ...
Günter Knittel
IWOMP
2007
Springer
15 years 5 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
IEEEPACT
2008
IEEE
15 years 6 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...