188 search results - page 6 / 38 » Instruction Set Extension Exploration in Multiple-Issue Arch... |
DAC
2001
ACM
16 years 17 days ago
2001
ACM
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
DSN
2004
IEEE
15 years 3 months ago
2004
IEEE
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
125
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SAMOS
2010
Springer
14 years 10 months ago
2010
Springer
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
102
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ISCA
2005
IEEE
15 years 5 months ago
2005
IEEE
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
100
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APCSAC
2001
IEEE
15 years 3 months ago
2001
IEEE
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...