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ITP
2010
155views Mathematics» more  ITP 2010»
15 years 3 months ago
A Trustworthy Monadic Formalization of the ARMv7 Instruction Set Architecture
Abstract. This paper presents a new HOL4 formalization of the current ARM instruction set architecture, ARMv7. This is a modern RISC architecture with many advanced features. The f...
Anthony C. J. Fox, Magnus O. Myreen
DAC
2005
ACM
16 years 17 days ago
Fine-grained application source code profiling for ASIP design
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...
Kingshuk Karuri, Mohammad Abdullah Al Faruque, Ste...
VEE
2006
ACM
139views Virtualization» more  VEE 2006»
15 years 5 months ago
Vector LLVA: a virtual vector instruction set for media processing
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-speciï¬...
Robert L. Bocchino Jr., Vikram S. Adve
CAMP
2005
IEEE
15 years 1 months ago
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
Domenico Barretta, Gianluca Palermo, Mariagiovanna...
DAC
2007
ACM
16 years 18 days ago
RISPP: Rotating Instruction Set Processing Platform
Adaptation in embedded processing is key in order to address efficiency. The concept of extensible embedded processors works well if a few a-priori known hot spots exist. However,...
Jörg Henkel, Lars Bauer, Muhammad Shafique, S...