369 search results - page 18 / 74 » Instruction set mapping for performance optimization |
ICASSP
2011
IEEE
14 years 3 months ago
2011
IEEE
The paper presents a lossless coding method based on predictor blending approach that codes nine widely used benchmark images with the lowest average bitrate ever published. At th...
187
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GECCO
2009
Springer
14 years 9 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
CATA
2003
15 years 1 months ago
2003
Many current general purpose processors use extensions to the instruction set architecture to enhance the performance of digital image processing and multimedia applications. In t...
108
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DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...