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» Instruction set mapping for performance optimization
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ECOOP
1997
Springer
15 years 6 months ago
Near Optimal Hierarchical Encoding of Types
A type inclusion test is a procedure to decide whether two types are related by a given subtyping relationship. An efficient implementation of the type inclusion test plays an impo...
Andreas Krall, Jan Vitek, R. Nigel Horspool
PPOPP
2009
ACM
16 years 2 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
15 years 7 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
TVLSI
2010
14 years 8 months ago
Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
Christos-Savvas Bouganis, Iosifina Pournara, Peter...
JILP
2002
83views more  JILP 2002»
15 years 1 months ago
Using Statistical and Symbolic Simulation for Microprocessor Performance Evaluation
As microprocessor designs continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models...
Mark Oskin, Frederic T. Chong, Matthew K. Farrens