369 search results - page 35 / 74 » Instruction set mapping for performance optimization |
170
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MICRO
1996
IEEE
15 years 7 months ago
1996
IEEE
The Java bytecode language is emerging as a software distribution standard. With major vendors committed to porting the Java run-time environment to their platforms, programs in J...
148
Voted
AIPR
2008
IEEE
15 years 5 months ago
2008
IEEE
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
131
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CODES
2009
IEEE
15 years 7 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
142
Voted
CODES
2003
IEEE
15 years 8 months ago
2003
IEEE
Distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases...
108
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CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...