369 search results - page 44 / 74 » Instruction set mapping for performance optimization |
136
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HPCA
2000
IEEE
15 years 6 months ago
2000
IEEE
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
133
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JSAC
2006
15 years 1 months ago
2006
This tutorial paper overviews recent developments in optimization-based approaches for resource allocation problems in wireless systems. We begin by overviewing important results i...
120
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ASPDAC
2006
ACM
15 years 8 months ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
141
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EUROPAR
2010
Springer
15 years 2 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
146
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EUROPAR
2010
Springer
15 years 3 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...