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FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
15 years 7 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit
ECRTS
2007
IEEE
15 years 8 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...
FGR
2000
IEEE
181views Biometrics» more  FGR 2000»
15 years 6 months ago
Face Detection Using Mixtures of Linear Subspaces
We present two methods using mixtures of linear subspaces for face detection in gray level images. One method uses a mixture of factor analyzers to concurrently perform clustering...
Ming-Hsuan Yang, Narendra Ahuja, David J. Kriegman
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
15 years 3 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal
LCPC
2007
Springer
15 years 8 months ago
Associative Parallel Containers in STAPL
The Standard Template Adaptive Parallel Library (stapl) is a parallel programming framework that extends C++ and stl with support for parallelism. stapl provides a collection of pa...
Gabriel Tanase, Chidambareswaran Raman, Mauro Bian...