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» Instruction set mapping for performance optimization
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
15 years 8 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
EUROPAR
1997
Springer
15 years 6 months ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
BMCBI
2008
211views more  BMCBI 2008»
15 years 2 months ago
CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment
Background: Searching for similarities in protein and DNA databases has become a routine procedure in Molecular Biology. The Smith-Waterman algorithm has been available for more t...
Svetlin Manavski, Giorgio Valle

Publication
285views
15 years 5 months ago
Center of mass encoding: a self-adaptive representation with adjustable redundancy for real-valued parameters
In this paper we describe a new class of representations for realvalued parameters called Center of Mass Encoding (CoME). CoME is based on variable length strings, it is self-adap...
Claudio Mattiussi, Peter Dürr, Dario Floreano
BMCBI
2006
116views more  BMCBI 2006»
15 years 2 months ago
A model-based approach to selection of tag SNPs
Background: Single Nucleotide Polymorphisms (SNPs) are the most common type of polymorphisms found in the human genome. Effective genetic association studies require the identific...
Pierre Nicolas, Fengzhu Sun, Lei M. Li