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VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
15 years 10 months ago
Variable Resizing for Area Improvement in Behavioral Synthesis
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
R. Gopalakrishnan, Rajat Moona
COMPSAC
2005
IEEE
15 years 3 months ago
Adaptive Testing, Oracle Generation, and Test Case Ranking for Web Services
Web services and service-oriented architecture are emerging technologies that are changing the way we develop and use computer software. Due to the standardization of web services...
Wei-Tek Tsai, Yinong Chen, Raymond A. Paul, Hai Hu...
CODES
2006
IEEE
15 years 3 months ago
Automatic generation of transaction level models for rapid design space exploration
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rain...
96
Voted
TII
2010
166views Education» more  TII 2010»
14 years 4 months ago
Source-to-Source Architecture Transformation for Performance Optimization in BIP
Behavior, Interaction, Priorities (BIP) is a component framework for constructing systems from a set of atomic components by using two kinds of composition operators: interactions ...
Marius Bozga, Mohamad Jaber, Joseph Sifakis
ESANN
2007
14 years 11 months ago
Transition from initialization to working stage in biologically realistic networks
Natural cortical neurons form functional networks through a complex set of developmental steps. A key process in early development is the transition of the spontaneous network dyna...
Andreas Herzog, Karsten Kube, Bernd Michaelis, Ana...