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ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
16 years 1 months ago
Flexible Decoupled Transactional Memory Support
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. ...
ISPASS
2008
IEEE
16 years 1 months ago
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
Lee Baugh, Craig B. Zilles
199
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CODES
2007
IEEE
16 years 1 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
ICEBE
2007
IEEE
174views Business» more  ICEBE 2007»
16 years 29 days ago
Worksheet-Driven UMM Modeling of B2B Services
In the development process of a B2B system it is crucial that the business experts are able to express and evaluate agreements and commitments between the partners and that the so...
Christian Huemer, Marco Zapletal, Philipp Liegl, R...
ISPASS
2007
IEEE
16 years 28 days ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
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