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CGO
2004
IEEE
15 years 10 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler
CODES
2004
IEEE
15 years 10 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CC
2006
Springer
125views System Software» more  CC 2006»
15 years 10 months ago
Path-Based Reuse Distance Analysis
Abstract. Profiling can effectively analyze program behavior and provide critical information for feedback-directed or dynamic optimizations. Based on memory profiling, reuse dista...
Changpeng Fang, Steve Carr, Soner Önder, Zhen...
CC
2006
Springer
122views System Software» more  CC 2006»
15 years 10 months ago
Context-Sensitive Points-to Analysis: Is It Worth It?
We present the results of an empirical study evaluating the precision of subset-based points-to analysis with several variations of context sensitivity on Java benchmarks of signif...
Ondrej Lhoták, Laurie J. Hendren
CASES
2001
ACM
15 years 10 months ago
Application specific architectures: a recipe for fast, flexible and power efficient designs
The general purpose processor has long been the focus of intense optimization efforts that have resulted in an impressive doubling of performance every 18 months. However, recent ...
Christopher T. Weaver, Rajeev Krishna, Lisa Wu, To...
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