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134
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ICS
1999
Tsinghua U.
15 years 7 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
ICVS
1999
Springer
15 years 7 months ago
Face-Tracking and Coding for Video Compression
While computing power and transmission bandwidth have both been steadily increasing over the last few years, bandwidth rather than processing power remains the primary bottleneck f...
William E. Vieux, Karl Schwerdt, James L. Crowley
142
Voted
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 7 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
102
Voted
ICRA
1998
IEEE
132views Robotics» more  ICRA 1998»
15 years 7 months ago
A 3-D Self-Reconfigurable Structure
: A three-dimensional, self-reconfigurable structure is proposed. The structure is a fully distributed system composed of many identical 3-D units. Each unit has functions of chang...
Satoshi Murata, Haruhisa Kurokawa, Eiichi Yoshida,...
120
Voted
IPPS
1998
IEEE
15 years 7 months ago
Update Protocols and Iterative Scientific Applications
Software DSMs have been a research topic for over a decade. While good performance has been achieved in some cases, consistent performance has continued to elude researchers. This...
Peter J. Keleher
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