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161
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VLSID
2000
IEEE
15 years 10 months ago
2000
IEEE
A methodology for reducing ground bounce in typical microprocessors and image processing architectures has been described. As we approach Gigascale Integration, chip power consump...
189
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BPM
2000
Springer
15 years 10 months ago
2000
Springer
In this article a general business process architecture is presented, which is based on the Architecture of Integrated Information Systems (ARIS) and which is composed of the four ...
162
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DFT
1999
IEEE
15 years 10 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
182
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AINA
2005
IEEE
15 years 8 months ago
2005
IEEE
—In this paper, a traffic aggregation based SIP over MPLS network architecture is proposed to integrate SIP protocol with traffic engineering (TE) enabled MPLS network seamlessly...
191
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RECOSOC
2007
15 years 7 months ago
2007
Nowadays, reconfigurable and multiprocessor systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable especially if error...