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ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
15 years 6 months ago
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
Radu Marculescu, Diana Marculescu, Larry T. Pilegg...
HPCA
2007
IEEE
15 years 10 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
PDPTA
2000
14 years 11 months ago
Evaluation of Integrated Error Processing and Fault Diagnosis in Multiprocessor Systems
This paper deals with multiprocessor systems required to provide both high performance and good figures of dependability attributes. Fault tolerance is pursued through a proper co...
Felicita Di Giandomenico, Silvano Chiaradonna, And...
HASE
1998
IEEE
15 years 2 months ago
ROAFTS: A Middleware Architecture for Real-Time Object-Oriented Adaptive Fault Tolerance Support
: A middleware architecture named ROAFTS (Real-time Object-oriented Adaptive Fault Tolerance Support) is presented. ROAFTS is designed to support adaptive fault-tolerant execution ...
K. H. Kim
ISQED
2002
IEEE
111views Hardware» more  ISQED 2002»
15 years 2 months ago
Incorporating Fault Tolerance in Analog-to-Digital Converters (ADCs)
The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity ...
Mandeep Singh, Israel Koren