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» Integrating Neural Networks with Special Purpose Simulation
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ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
15 years 2 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
174
Voted
ICDE
2006
IEEE
201views Database» more  ICDE 2006»
15 years 11 months ago
Counting at Large: Efficient Cardinality Estimation in Internet-Scale Data Networks
Counting in general, and estimating the cardinality of (multi-) sets in particular, is highly desirable for a large variety of applications, representing a foundational block for ...
Nikos Ntarmos, Peter Triantafillou, Gerhard Weikum
SENSYS
2004
ACM
15 years 3 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...
60
Voted
AUTOMATICA
2006
98views more  AUTOMATICA 2006»
14 years 9 months ago
Stabilization of sampled-data nonlinear systems via backstepping on their Euler approximate model
Two integrator backstepping designs are presented for digitally controlled continuous-time plants in special form. The controller designs are based on the Euler approximate discre...
Dragan Nesic, Andrew R. Teel
VTC
2007
IEEE
161views Communications» more  VTC 2007»
15 years 3 months ago
Early Results on Hydra: A Flexible MAC/PHY Multihop Testbed
— Hydra is a flexible wireless network testbed being developed at UT Austin. Our focus is networks that support multiple wireless hops and where the network, especially the MAC,...
Ketan Mandke, Soon-Hyeok Choi, Gibeom Kim, Robert ...