17 search results - page 1 / 4 » Integration of Clock Skew and Register Delays into a Retimin... |
74
Voted
ISCAS
1993
IEEE
15 years 5 months ago
1993
IEEE
65
Voted
ICCAD
1994
IEEE
15 years 5 months ago
1994
IEEE
105
Voted
ICCAD
2004
IEEE
15 years 10 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
117
Voted
ISPD
2004
ACM
15 years 6 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
102
Voted
ICCAD
2003
IEEE
15 years 10 months ago
2003
IEEE
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...