784 search results - page 80 / 157 » Integration of Task and Data Parallelism: A Coordination-Bas... |
DDECS
2007
IEEE
15 years 6 months ago
2007
IEEE
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
129
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BMCBI
2010
15 years 3 hour ago
2010
Background: Analysis of data from high-throughput experiments depends on the availability of well-structured data that describe the assayed biomolecules. Procedures for obtaining ...
107
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BMCBI
2010
15 years 2 hour ago
2010
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
102
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IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
119
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GCA
2009
14 years 9 months ago
2009
This paper highlights the need to meet both Grid user and resource provider security requirements, describing the rationale for securing Grid workflows: a set of tasks arranged int...