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IPPS
2006
IEEE
15 years 4 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
EUROSYS
2009
ACM
15 years 7 months ago
Predicting replicated database scalability from standalone database profiling
This paper develops analytical models to predict the throughput and the response time of a replicated database using measurements of the workload on a standalone database. These m...
Sameh Elnikety, Steven G. Dropsho, Emmanuel Cecche...
CASES
2006
ACM
15 years 3 months ago
A dynamic binary instrumentation engine for the ARM architecture
Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software. While numerous DBI frameworks have been developed for general-purpose ...
Kim M. Hazelwood, Artur Klauser
OOPSLA
2005
Springer
15 years 3 months ago
PolyD: a flexible dispatching framework
The standard dispatching mechanisms built into programming languages are sometimes inadequate to the needs of the programmer. In the case of Java, the need for more flexibility h...
Antonio Cunei, Jan Vitek
OOPSLA
2005
Springer
15 years 3 months ago
Using refactorings to automatically update component-based applications
Frameworks and libraries change their APIs during evolution. Migrating an application to the new API is tedious and disrupts the development process. Although some tools and techn...
Danny Dig